µPD6133, 6134
3. PORT REGISTERS (PX)
The KI/O port, the KI port, the special ports (S0, S1/LED), and the control register are treated as port registers.
At reset, port register values are shown below.
Figure 3-1. Port Register Organization
KI/O7
KI3
0
0
Port Register
At Reset
P0
FFH
P10
P00
KI/O6
KI/O5
KI/O4
KI/O3
P1
KI/O2
KI/O1
KI/O0
× FHNote
P11
P01
KI2
KI1
KI0
S1/LED
S0
1
1
P3 (Control register 0)
03H
P13
P03
0
DP9
DP8
TCTL CARY MOD1 MOD0
P4 (Control register 1)
26H
P14
P04
0
KI
S0/S1
pull-down pull-down
0
S1/LEDmode KI/O mode S0 mode
Note ×: Refers to the value based on the KI pin state.
Table 3-1. Relationship between Ports and their Read/Write
Port Name
KI/O
KI
S0
S1/LED
INPUT Mode
Read
Write
Pin state
Output latch
Pin state
—
Pin state
—
Pin state
—
OUTPUT Mode
Read
Write
Output latch Output latch
—
—
Note
—
Pin state
—
Note When in OFF mode, “1” is normally read.
14
Data Sheet U10454EJ6V0DS00