AD871JD 查看數據表（PDF） - Analog Devices

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AD871JD

Complete 12-Bit 5 MSPS Monolithic A/D Converter

Analog Devices 

AD871

+5V REF

RT

2k⍀

2.5V

R

3.9k⍀

REF IN

AD871

5k⍀

REF GND

Figure 21. Optional +5 V Reference Input Circuit

REFERENCE GROUND

The REF GND pin provides the reference point for both the

reference input and the reference output. When the internal ref-

erence is operating, it will draw approximately 500 µA of current

through the reference ground, so a low impedance path to the

external common is desirable. The AD871 can tolerate a fairly

large difference between REF GND and AGND, up to

± 1 V, without any performance degradation.

REFERENCE OUTPUT

The AD871 features an onboard, curvature compensated band-

gap reference that has been laser trimmed for both absolute

value and temperature drift. The output stage of the reference

was designed to allow the use of an external capacitor to limit

the wideband noise. As Figure 22 illustrates, a 1 µF capacitor on

the reference output is required for stability of the reference out-

put buffer. Note: If used, an external reference may become un-

stable with this capacitor in place.

2.55

2.54

2.53

2.52

2.51

2.50

2.49

2.48

2.47

2.46

2.45

–55 –35 –15 5

25 45 65 85 105 125

TEMPERATURE – ؇C

Figure 23. Reference Output Voltage vs. Temperature

2.50

2.48

2.46

2.44

2.42

0.1␮F

REF IN

AD871

REF GND

1␮F

+

REF OUT

Figure 22. Typical Reference Decoupling Connection

With this capacitor in place, the noise on the reference output is

approximately 28 µV rms at room temperature. Figure 23 shows

the typical temperature drift performance of the reference, while

Figure 24 illustrates the variation in reference voltage with load

currents.

The output stage is designed to provide at least 2 mA of output

current, allowing a single reference to drive up to four AD871s

or other external loads. The power supply rejection of the refer-

ence is better than 54 dB at dc.

2.40

1k

10k

100k

1M

REFERENCE OUTPUT LOAD – ⍀

Figure 24. Reference Output Voltage vs. Output Load

DIGITAL OUTPUTS

In 28-lead packages, the AD871 output data is presented in

twos complement format. Table III indicates offset binary and

twos complement output for various analog inputs.

Table III. Output Data Format

Analog Input

Digital Output

VINA–VINB

Offset Binary Twos Complement OTR

≥0.999756 V 1111 1111 1111 0111 1111 1111 1

0.999268 V 1111 1111 1111 0111 1111 1111 0

0V

1000 0000 0000 0000 0000 0000 0

–1 V

0000 0000 0000 1000 0000 0000 0

–1.000244 V 0000 0000 0000 1000 0000 0000 1

Users requiring offset binary encoding may simply invert the

MSB pin. In the 44-terminal surface mount packages, both

MSB and MSB bits are provided.

The AD871 features a digital out-of-range (OTR) bit that goes

high when the input exceeds positive full scale or falls below

negative full scale. As Table III indicates, the output bits will be

set appropriately according to whether it is an out-of-range high

condition or an out-of-range low condition. Note that if the in-

put is driven beyond +1.5 V, the digital outputs may not stay at

+FS, but may actually fold back to midscale.

–12–

REV. A

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