SP8531KS 查看數據表（PDF） - Signal Processing Technologies
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SP8531KS Datasheet PDF : 16 Pages
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TIMING CHARACTERISTICS
(Typical @ 25°C with VDD = +5V, unless otherwise noted)
PARAMETER
Thoughput Time (tTP=tA+tC)
Acquisition Time (tA) (2 SCLK Periods)
Conversion Time (tC) (15 SCLK Periods)
SCLK Low Pulse Width (tSKL)
SCLK High Pulse Width (tSKH)
SCLK Period (tSKT)
Bus Access Time (tCBA)
Bus Relinquish Time (tBR)
Setup Time -SCLK Falling to CSN Falling (tCSSU)
CSN Low Before SCLK Rises (tCS)
SCLK Falling to Data Valid (tSD)
CSN Falling to status Rising (tDCS)
SCLK 17 Falling to Status Rising Free Run (tDSS)
SCLK 16 Falling to Status Falling ( tDSE)
Delay SD Low to initiate Conversion (tPU)
Aperture Delay Slave-Mode (tAPC)
Aperture Delay Free-Running Mode (tAPS)
MIN.
4.25
400
3.75
110
110
250
0
90
TYP.
500
125
125
51
45
50
69
70
45
5
30
35
MAX.
UNIT
µs
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
COND.
SP8531DS/01
SP8531 12-Bit Sampling Serial Out Analog to Digital Converter
8
© Copyright 1999 Sipex Corporation
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