GM16C550 查看數據表（PDF） - Hynix Semiconductor

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GM16C550

ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH FIFOs

Hynix Semiconductor 

Timing Waveforms (Continued)

Write Cycle

ADS

A2,A1,A0

CS2 ,CS1,CS0

WR ,WR

tADS

tAS

tAH

VALID

tCS

tCH

VALID

tSCW*

tAW*

tWR

ACTIVE

tWA*

tCSW*

tWC

RD ,RD

DATA

D0-D7

*Applicable Only When ADS is Tied Low.

tDS tDH

VALID DATA

ADS

A2,A1,A0

CS2 ,CS1,CS0

RD ,RD

Read Cycle

tADS

tAS

tAH

VALID

tCS

tCH

VALID

tCSR*

tAR*

tRD

ACTIVE

tRA*

tRCS*

tRC

WR ,WR

DDIS

DATA

D0-D7

tRDD

tRDD

tRVD

tHZ

VALID

DATA

*Applicable Only When ADS is Tied Low.

6

GM16C550

WC

ACTIVE

OR

ACTIVE

RC

ACTIVE

OR

ACTIVE

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