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SI4702-C19 查看數據表(PDF) - Silicon Laboratories

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SI4702-C19 Datasheet PDF : 46 Pages
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Si4702/03-C19
Table 8. FM Receiver Characteristics1,2
(VD = VA = 2.7 to 5.5 V, VIO = 1.5 to 3.6 V, TA = –20 to 85 °C)
Parameter
Symbol
Test Condition
Min
Typ Max
Unit
Input Frequency
Sensitivity3,4,5,6,7
fRF
76
108
MHz
(S+N)/N = 26 dB
1.7
3.5 µVEMF
Sensitivity (50 matching
network)3,4,5,6,8
RDS Sensitivity8
LNA Input Resistance8,9
LNA Input Capacitance8,9
Input IP38,10
AM Suppression3,4,5,8,9
(S+N)/N = 26 dB
f = 2 kHz,
RDS BLER < 5%
m = 0.3
1.1
15
3
4
4
5
104
106
40
55
— µVEMF
— µVEMF
5
k
6
pF
— dBµVEMF
dB
Adjacent Channel Selectivity
±200 kHz
35
50
dB
Alternate Channel Selectivity
Spurious Response Rejection8
±400 kHz
In-band
60
70
dB
35
dB
RCLK Frequency
RCLK Frequency Tolerance11
— 32.768 —
kHz
Frequency Spacing =
100 or 200 kHz
–200
200
ppm
Audio Output Voltage3,4,5,9
Audio Output L/R Imbalance3,4,9,12
Frequency Spacing =
50 kHz
–50
72
80
50
90
mVRMS
1
dB
Audio Frequency Response Low8
–3 dB
30
Hz
Audio Frequency Response High8
Audio Stereo Separation3,9,12
–3 dB
15
kHz
25
dB
Notes:
1. Additional testing information is available in Application Note AN234. Volume = maximum for all tests.
2. Important Note: To ensure proper operation and FM receiver performance, follow the guidelines in “AN231:
Si4700/01/02/03 Headphone and Antenna Interface.” Silicon Laboratories will evaluate schematics and layouts for
qualified customers.
3. FMOD = 1 kHz, 75 µs de-emphasis
4. MONO = 1, and L = R unless noted otherwise.
5. f = 22.5 kHz.
6. BAF = 300 Hz to 15 kHz, A-weighted.
7. Typical sensitivity with headphone matching network.
8. Guaranteed by characterization.
9. VEMF = 1 mV.
10. |f2 – f1| > 1 MHz, f0 = 2 x f1 – f2. AGC is disabled by setting AGCD = 1. Refer to "6. Register Descriptions" on page 23.
11. The channel spacing is selected with the SPACE[1:0] bits. Refer to "6. Register Descriptions" on page 23. Seek/Tune
timing is guaranteed for 100 and 200 kHz channel spacing.
12. f = 75 kHz.
13. The de-emphasis time constant is selected with the DE bit. Refer to "6. Register Descriptions" on page 23.
14. At LOUT and ROUT pins.
15. Do not enable STC interrupts before the powerup time is complete. If STC interrupts are enabled before the powerup
time is complete, an interrupt will be generated within the powerup interval when the initial default tune operation is
complete. See "AN230: Si4700/01/02/03 Programmer’s Guide" for more information.
16. Minimum and maximum at room temperature (25 °C).
12
Rev. 1.1

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