Si3000
Register 2. Control 2
Bit
D7
D6
Name
Type
Reset Settings = 0000_0000
D5
D4
D3
D2
D1
D0
HPFD
PLL
DL1
DL2
R/W
R/W
R/W
R/W
Bit
Name
Function
7:5
Reserved Read returns zero.
4
HPFD
High Pass Filter (HPF) Disable.
1 = HPF disabled
0 = HPF enabled
3
PLL
PLL Divide by 10.
1 = Sets final stage of PLL to divide by 10.
0 = Sets final stage of PLL to divide by 5.
2
DL1
Digital Loopback.
1 = Enables digital loopback (DAC analog out ADC analog in).
0 = Normal operation
1
DL2
Digital Loopback.
1 = Enables digital loopback (DAC one bit ADC one bit).
0 = Normal operation
0
Reserved Read returns zero.
Rev. 1.4
21