
Si3000
3. Control Registers
Note: Any register not listed here is reserved and should not be written. Any register bit labelled reserved should be written to
zero during writes to the register. Register 0 can be read (always returns 0) and written safely.
Register Name
1 Control 1
2 Control 2
3 PLL1 Divide N1
4 PLL1 Multiply M1
5 RX Gain Control 1
6 ADC Volume Control
7 DAC Volume Control
8 Status Report
9 Analog Attenuation
Table 13. Register Summary
Bit 7
SR
Bit 6
LIG
SLSC SRSC
Bit 5
LIM
LOSC
Bit 4 Bit 3
SPD
LPD
HPFD PLL
Divider N1
Multiplier M1
MCG
RXG
TXG
Bit 2
HPD
DL1
MCM
LOT
Bit 1
MPD
DL2
Bit 0
CPD
HIM
LOM
SLM
IIR
HOM
SRM
SOT
Rev. 1.4
19