SC483 查看數據表（PDF） - Semtech Corporation

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SC483

Dual Synchronous Buck Pseudo Fixed Frequency Power Supply Controller

Semtech Corporation 

SC483

POWER MANAGEMENT

Be sure to include inductor resistance and MOSFET on-

state voltage drops when performing worst-case dropout

duty-factor calculations.

SC483 System DC Accuracy

Two IC parameters affect system DC accuracy, the error

comparator threshold voltage variation and the

switching frequency variation with line and load. The

error comparator threshold does not drift significantly

with supply and temperature. Thus, the error

comparator contributes 1% or less to DC system

inaccuracy.

Board components and layout also influence DC

accuracy. The use of 1% feedback resistors contribute

1%. If tighter DC accuracy is required use 0.1%

feedback resistors.

The on pulse in the SC483 is calculated to give a pseudo

fixed frequency. Nevertheless, some frequency variation

with line and load can be expected. This variation changes

the output ripple voltage. Because constant-on

regulators regulate to the valley of the output ripple, ½

of the output ripple appears as a DC regulation error.

For example, if the feedback resistors are chosen to

divide down the output by a factor of five, the valley of

the output ripple will be VOUT. For example: if VOUT is

2.5V and the ripple is 50mV with VBAT = 6V, then the

measured DC output will be 2.525V. If the ripple increases

to 80mV with VBAT = 25V, then the measured DC output

will be 2.540V.

The maximum input voltage (V ) is determined by

BAT(MAX)

the highest AC adaptor voltage. The minimum input

voltage (VBAT(MIN)) is determined by the lowest battery

voltage after accounting for voltage drops due to

connectors, fuses and battery selector switches. For the

purposes of this design example we will use a VBAT range

of 8V to 20V and design OUT2. The design for OUT1

employs the same technique.

Four parameters are needed for the output:

1) nominal output voltage, VOUT (we will use 1.2V)

2) static (or DC) tolerance, TOLST (we will use +/-4%)

3) transient tolerance, TOL and size of transient (we will

TR

use +/-8% and 6A for purposes of this demonstration).

4) maximum output current, IOUT (we will design for 6A)

Switching frequency determines the trade-off between

size and efficiency. Increased frequency increases the

switching losses in the MOSFETs, since losses are a

function of VIN2. Knowing the maximum input voltage and

budget for MOSFET switches usually dictates where the

design ends up. It is recommended that the two outputs

are designed to operate at frequencies approximately

25% apart to avoid any possible interaction. It is also

recommended that the higher frequency output is the

lower output voltage output, since this will tend to have

lower output ripple and tighter specifications. The

default RtON values of 1MΩ and 715kΩ are suggested

as a starting point, but these are not set in stone. The

first thing to do is to calculate the on-time, tON, at VBAT(MIN)

and V , BAT(MAX) since this depends only upon VBAT, VOUT and

RtON.

The output inductor value may change with current. This

will change the output ripple and thus the DC output

voltage. It will not change the frequency.

Switching frequency variation with load can be minimized

by choosing MOSFETs with lower R . High R

DS(ON)

DS(ON)

MOSFETs will cause the switching frequency to increase

as the load current increases. This will reduce the ripple

and thus the DC output voltage.

For VOUT < 3.3V:

( ) tON_ VBAT(MIN) = 3.3 • 10−12 • RtON + 37 • 103



•

VOUT

VBAT(MIN)







+

50

• 10−9 s

and

( ) tON_ VBAT(MAX) = 3.3 • 10−12 •



RtON + 37 • 103

•

VOUT

VBAT ( MAX )







+

50

• 10−9 s

Design Procedure

Prior to designing an output and making component

selections, it is necessary to determine the input voltage

range and the output voltage specifications. For purposes

of demonstrating the procedure the output for the

schematic in Figure 8 on Page 16 will be designed.

From these values of tON we can calculate the nominal

switching frequency as follows:

( ) f = SW _ VBAT(MIN)

VOUT

V • t BAT(MIN) ON _ VBAT(MIN)

Hz

and

 2005 Semtech Corp.

11

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