SC4213H
Applications Information (continued)
Introduction
The SC4213H is intended for applications where high
current capability and very low dropout voltage are
required. It provides a very simple, low cost solution that
uses very little PCB real estate. Additional features include
an enable pin to allow for a very low power consumption
standby mode, and a fully adjustable output.
Component Selection
Input capacitor: A large bulk capacitance ≥ 4.7µF (output
load) should be closely placed to the input supply pin of
the SC4213H to ensure that Vin does not sag below 1.4V.
Also a minimum of 4.7µF ceramic capacitor is recom-
mended to be placed directly next to the Vin pin. This
allows for the device being some distance from any bulk
capacitance on the rail. Additionally, input droop due to
load transients is reduced, improving load transient
response. Additional capacitance may be added if required
by the application.
Output capacitor: A minimum bulk capacitance of 4.7µF,
along with a 0.1µF ceramic decoupling capacitor is recom-
mended. Increasing the bulk capacitance will improve the
overall transient response. The use of multiple lower value
ceramic capacitors in parallel to achieve the desired bulk
capacitance will not cause stability issues. Although
designed for use with ceramic output capacitors, the
SC4213H is extremely tolerant of output capacitor ESR
values and thus will also work comfortably with tantalum
output capacitors.
≤50kΩ). A suitable value for R2 can be chosen in the range
of 1kΩ to 50kΩ. R1 can then be calculated from:
( ) R1 = R2 ⋅
VO − VREF
VREF
Enable: Pulling this pin below 0.4V turns the regulator off,
reducing the quiescent current to a fraction of its operat-
ing value. A pull up resistor up to 400kOhms should be
connected from this pin to the VIN pin in applications
where supply voltages of Vin < 1.9V are required. For
applications with higher voltages than 1.9V, the EN pin
can be left open or connected to VIN.
Thermal Considerations
The power dissipation in the SC4213H is given by:
( ) PD ≈ IO ⋅ VIN − VO
The allowable power dissipation will be dependant on the
thermal impedance achieved in the application. The derat-
ing curve below is valid for the thermal impedance speci-
fied in the Thermal Information section on page 3.
Power Derating Curve
1.5
1
RTH(JA)=105OC/W
Noise immunity: In very electrically noisy environments,
it is recommended that 0.1µF ceramic capacitors be placed
from VIN to GND and VO to GND as close to the device
pins as possible.
External voltage selection resistors: The use of 1%
resistors, and designing for a current flow ≥ 10µA is rec-
ommended to ensure a well regulated output (thus R2
0.5
0
0
25
50
75
100
125
Ambient Temperature T A (OC)
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