74ABT843PW 查看數據表（PDF） - Philips Electronics
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74ABT843PW Datasheet PDF : 14 Pages
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Philips Semiconductors
9-bit bus interface latch with set and reset
(3-State)
Product specification
74ABT843
FEATURES
• High speed parallel latches
• Extra data width for wide address/data paths or buses carrying
parity
• Ideal where high speed, light loading, or increased fan-in are
required with MOS microprocessors
• Slim DIP 300 mil package
• Broadside pinout
• Output capability: +64mA/–32mA
• Latch-up protection exceeds 500mA per Jedec Std 17
• ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
• Power-up 3-State
• Power-up reset
DESCRIPTION
The 74ABT843 Bus interface latch is designed to eliminate the extra
packages required to buffer existing registers and provide extra data
width for wider data/address paths of buses carrying parity.
The 74ABT843 consists of nine D-type latches with 3-State outputs.
In addition to the LE and OE pins, it has a Master Reset (MR) pin
and Preset (PRE) pin. These pins are ideal for parity bus interfacing
in high performance systems. When MR is Low, the outputs are Low
if OE is Low. When MR is High, data can be entered into the latch.
When PRE is Low, the outputs are High, if OE is Low. PRE
overrides MR.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
tPLH
tPHL
CIN
COUT
ICCZ
Propagation delay
Dn to Qn
Input capacitance
Output capacitance
Total supply current
CONDITIONS
Tamb = 25°C; GND = 0V
CL = 50pF; VCC = 5V
VI = 0V or VCC
Outputs disabled;
VO = 0V or VCC
Outputs disabled; VCC = 5.5V
TYPICAL
5.0
4
7
500
UNIT
ns
pF
pF
nA
ORDERING INFORMATION
PACKAGES
24-Pin Plastic DIP
24-Pin plastic SO
24-Pin Plastic SSOP Type II
24-Pin Plastic TSSOP Type I
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
–40°C to +85°C
74ABT843 N
–40°C to +85°C
74ABT843 D
–40°C to +85°C
74ABT843 DB
–40°C to +85°C
74ABT843 PW
NORTH AMERICA
74ABT843 N
74ABT843 D
74ABT843 DB
74ABT843PW DH
DWG NUMBER
SOT222-1
SOT137-1
SOT340-1
SOT355-1
PIN CONFIGURATION
OE 1
D0 2
D1 3
D2 4
D3 5
D4 6
D5 7
TOP VIEW
D6 8
D7 9
D8 10
MR 11
GND 12
24 VCC
23 Q0
22 Q1
21 Q2
20 Q3
19 Q4
18 Q5
17 Q6
16 Q7
15 Q8
14 PRE
13 LE
SA00250
PIN DESCRIPTION
PIN NUMBER SYMBOL
1
OE
2, 3, 4, 5, 6,
7, 8, 9, 10
23, 22, 21, 20,
19,18, 17, 16, 15
11
D0-D8
Q0-Q8
MR
13
LE
14
PRE
12
GND
24
VCC
FUNCTION
Output enable input
(active-Low)
Data inputs
Data outputs
Master reset input (active-Low)
Latch enable input (active rising
edge)
Preset input (active-Low)
Ground (0V)
Positive supply voltage
1998 Jan 16
2
853-1620 18864
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