PSB2134 查看數據表（PDF） - Siemens AG
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PSB2134 Datasheet PDF : 95 Pages
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9.3 PCM-Interface Timing
PSB 2132
PSB 2134
Electrical Characteristics
t BCL
BCL 50%
FSC
DU/DD
t FSC_S
t FSC_H
t DR_S t DR_H
DU/DD
t BCLh
t FSC
t dDX
t dDXhz
High Imp.
ITT09777
Figure 38
Single Clocking Mode
Parameter
Symbol
Limit Values
Unit
min.
typ.
max.
Period of BCL
BCL high time
Period FSC
FSC setup time
FSC hold time
tBCL
1/768000
µs
tBCLh
tBCL/2
µs
tFSC
125
µs
tFSC_s
10
50
ns
tFSC_h
(tBCL - t BCLh) (tBCL - tBCLh)
ns
+ 10
+ 50
DU/DD setup time
tDR_s
10
50
ns
DU/DD hold time
tDR_h
10
50
ns
DU/DD delay time 1)
tdDX
25
50 (@ 200 pF)
ns
DU/DD delay time to high Z tdDXhz
25
50
ns
1) All delay times are made up by two components: an intrinsic time (min-time), caused by internal processings,
and a second component caused by external circuitry (C-load)
Semiconductor Group
92
09.97
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