PM6670AS 查看數據表（PDF） - STMicroelectronics

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PM6670AS

Complete DDR2/3 memory power supply controller

STMicroelectronics 

PM6670AS

Pin settings

Table 2. Pin functions (continued)

N°

Pin

Function

18

VCC

+5 V low-side gate driver supply. Bypass with a 100 nF capacitor to PGND.

19

CSNS

Current Sense Input for the switching section. This pin must be connected

through a resistor to the drain of the synchronous rectifier (RDSon sensing)

20

PHASE Switch node connection and return path for the high-side gate driver.

21

HGATE High-side gate driver output

22

BOOT

Bootstrap capacitor connection. Positive supply input of the high-side gate

driver.

Linear regulator input. Connect to VDDQ in normal configuration or to a

23

LDOIN

lower supply to reduce the power dissipation. A 10 μF bypass ceramic

capacitor is suggested for noise rejection enhancement. See Device

Description section for more details.

24

VTT

LDO linear regulator output. Bypass with a 20 μF (2x10 μF MLCC) filter

capacitor.

Doc ID 14436 Rev 2

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