PLL102-15 查看數據表（PDF） - PhaseLink Corporation
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PLL102-15 Datasheet PDF : 8 Pages
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PLL102-15
Low Skew Output Buffer
PIN DESCRIPTIONS
Name
Number Type
Description
VDD
CLK13
CLKOUT 3
GND
REF_IN2
CLK23
CLK33
NC
1
P 3.3V Power Supply.
2
O Buffered clock output.
3
O Buffered clock output. Internal feed back on this pin.
4
P Ground.
5
I
Input reference frequency. Spread spectrum modulation on this signal will be
passed to the output (up to 33kHz SST modulation).
6
O Buffered clock output.
7
O Buffered clock output.
8
- No connection.
Notes: 2: Weak pull-down. 3: Weak pull -down on all outputs.
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 05/06/03 Page 2
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