Philips Semiconductors
74LV164
8-bit serial-in/parallel-out shift register
Table 8: Dynamic characteristics …continued
GND = 0 V; tr = tf ≤ 2.5 ns; CL = 50 pF; RL = 1 kΩ; for test circuit see Figure 9.
Symbol Parameter
Conditions
trem
removal time MR to CP
see Figure 7
VCC = 1.2 V
VCC = 2.0 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
tsu
set-up time Dn to CP
see Figure 8
VCC = 1.2 V
VCC = 2.0 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
th
hold time Dn to CP
see Figure 8
VCC = 1.2 V
VCC = 2.0 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
fmax
maximum clock frequency
see Figure 6
VCC = 2.0 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
VCC = 3.3 V; CL = 15 pF
CPD
power dissipation capacitance VCC = 3.3 V
per gate
Tamb = −40 °C to +125 °C
tPHL,
tPLH
propagation delay CP to Qn
tPHL
propagation delay MR to Qn
see Figure 6
VCC = 1.2 V
VCC = 2.0 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
see Figure 7
VCC = 1.2 V
VCC = 2.0 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
Min Typ Max Unit
-
30
-
ns
19
10
-
ns
14
8
-
ns
11
6
-
ns
8
5
-
ns
-
15
-
ns
22
5
-
ns
16
4
-
ns
13
3
-
ns
9
2
-
ns
-
−10 -
ns
5
−3
-
ns
5
−2
-
ns
5
−2
-
ns
5
−1
-
ns
14
19
24
36
-
[2] [3] -
40
-
58
-
70
-
100 -
78
-
40
-
MHz
MHz
MHz
MHz
MHz
pF
-
-
-
ns
-
-
49
ns
-
-
36
ns
-
-
29
ns
-
-
24
ns
-
-
-
ns
-
-
49
ns
-
-
36
ns
-
-
29
ns
-
-
24
ns
9397 750 14501
Product data sheet
Rev. 03 — 4 February 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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