PD45128163G5-A10LT-9JF 查看數據表（PDF） - Elpida Memory, Inc

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PD45128163G5-A10LT-9JF

128M-bit Synchronous DRAM 4-bank, LVTTL WTR (Wide Temperature Range)

Elpida Memory, Inc 

Block Diagram

CLK

CKE

Clock

Generator

Address

Mode

Register

/CS

/RAS

/CAS

/WE

µPD45128441-T, 45128841-T, 45128163-T

Row

Address

Buffer

&

Refresh

Counter

Column

Address

Buffer

&

Burst

Counter

Bank D

Bank C

Bank B

Bank A

Sense Amplifier

Column Decoder &

Latch Circuit

Data Control Circuit

DQM

DQ

Data Sheet E0218N20

7

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