Philips Semiconductors
P89LPC906/907/908
8-bit microcontrollers with two-clock 80C51 core
5.2 Pin description
Table 3: P89LPC906 pin description
Symbol
Pin
Type Description
P0.4 to P0.6
I/O
Port 0: Port 0 is an I/O port with a user-configurable output types. During reset Port 0
latches are configured in the input only mode with the internal pull-up disabled. The
operation of Port 0 pins as inputs and outputs depends upon the port configuration
selected. Each port pin is configured independently. Refer to Section 8.11.1 “Port
configurations” and Table 13 “DC electrical characteristics” for details.
The Keypad Interrupt feature operates with Port 0 pins.
All pins have Schmitt triggered inputs.
Port 0 also provides various special functions as described below:
8
I/O
P0.4 — Port 0 bit 4.
I
CIN1A — Comparator positive input.
I
KBI4 — Keyboard input 4.
7
I/O
P0.5 — Port 0 bit 5.
I
CMPREF — Comparator reference (negative) input.
I
KBI5 — Keyboard input 5.
3
I/O
P0.6 — Port 0 bit 6.
O
CMP1 — Comparator 1 output.
I
KBI6 — Keyboard input 6.
P1.5
I
P1.5 — Port 1 bit 5 (input only).
1
I
RST — External Reset input during Power-on or if selected via UCFG1. When
functioning as a reset input a LOW on this pin resets the microcontroller, causing I/O
ports and peripherals to take on their default states, and the processor begins
execution at address 0. Also used during a power-on sequence to force In-System
Programming mode. When using an oscillator frequency above 12 MHz, the
reset input function of P1.5 must be enabled. An external circuit is required to
hold the device in reset at power-up until VDD has reached its specified level.
When system power is removed VDD will fall below the minimum specified
operating voltage. When using an oscillator frequency above 12 MHz, in some
applications, an external brownout detect circuit may be required to hold the
device in reset when VDD falls below the minimum specified operating voltage.
9397 750 14467
Product data
Rev. 05 — 17 December 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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