Philips Semiconductors
8-bit microcontroller
Product specification
P83C562; P80C562
12.2.2 CAPTURE CONTROL REGISTER (CTCON)
Table 16 Capture Control Register (SFR address EBH)
7
CTN3
6
CTP3
5
CTN2
4
CTP2
3
CTN1
2
CTP1
Table 17 Description of CTCON bits
BIT
SYMBOL
DESCRIPTION
7
CTN3 Interrupt triggered on negative edge of CT3I.
6
CTP3 Interrupt triggered on positive edge of CT3I.
5
CTN2 Interrupt triggered on negative edge of CT2I.
4
CTP2 Interrupt triggered on positive edge of CT2I
3
CTN1 Interrupt triggered on negative edge of CT1I.
2
CTP1 Interrupt triggered on positive edge of CT1I.
1
CTN0 Interrupt triggered on negative edge of CT0I.
0
CTP0 Interrupt triggered on positive edge of CT0I.
12.2.3 INTERRUPT FLAG REGISTER (TM2IR)
Table 18 Interrupt Flag Register (SFR address C8H)
7
T2OV
6
CMI2
5
CMI1
4
CMI0
3
CTI3
2
CTI2
Table 19 Description of TM2IR bits (see notes 1 and 2)
BIT
SYMBOL
DESCRIPTION
7
T2OV T2: 16-bit overflow interrupt flag.
6
CMI2 CM2: interrupt flag.
5
CMI1 CM1: interrupt flag.
4
CMI0 CM0: interrupt flag.
3
CTI3 CT3: interrupt flag.
2
CTI2 CT2: interrupt flag.
1
CTI1 CT1: interrupt flag.
0
CTI0 CT0: interrupt flag.
Notes
1. Interrupt Enable Register 1 (IEN1) is used to enable/disable Timer 2 interrupts.
2. Interrupt Priority Register 1 (IP1) is used to determine the Timer 2 interrupt priority.
1
CTN0
1
CTI1
0
CTP0
0
CTI0
1997 Apr 08
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