MC100H644FNR2 查看數據表（PDF） - ON Semiconductor
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MC100H644FNR2 Datasheet PDF : 5 Pages
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MC10H644 MC100H644
PIN NAMES
PIN
GT
VT
VE
GE
DE, DE
VBB
DT
Qn, Qn
SEL
R
FUNCTION
TTL Ground (0V)
TTL VCC (+5.0V)
ECL VCC (+5.0V)
ECL Ground (0V)
ECL Signal Input (positive ECL)
VBB Reference Output
TTL Signal Input
Signal Outputs (TTL)
Input Select (TTL)
Reset (TTL)
VBB
DE
(ECL)
DE
(ECL)
DT
(TTL)
SEL
(TTL)
R
(TTL)
LOGIC DIAGRAM
2:1 MUX
÷2
÷4
TTL OUTPUTS
Q0
Q1
Q2
Q3
Q4
Q5
AC CHARACTERISTICS (VT = VE = 5.0 V ±5%)
Symbol
Characteristic
tPLH
Propagation Delay ECL
D to Output
All Outputs
tPLH
Propagation Delay TTL
D to Output
tskwd*
tskwd*
tskwd*
tskp–p*
tPD
Within–Device Skew
Within–Device Skew
Within–Device Skew
Part–to–Part Skew
Propagation Delay
R to Output
Q0, 1, 4, 5
Q2, Q3
All Outputs
Q0, 1, 4, 5
All Outputs
tR
tF
fmax
TW
Output Rise/Fall Time
0.8V – 2.0V
All Outputs
Maximum Input Frequency
Minimum Pulse Width Reset
trr
TPW
Reset Recovery Time
Pulse Width Out High or
Low @ fin = 100 MHz
and CL = 50 pf
Q0, 1
TS
Setup Time
SEL to DE, DT
TH
Hold Time
SEL to DE, DT
* Skews are specified for Identical Edges
0°C
Min Max
5.8
6.8
5.7
6.7
–
0.5
–
0.5
–
1.5
–
1.0
4.3
7.3
–
1.6
135
–
1.5
–
1.25
–
9.5
10.5
2.0
–
2.0
–
25°C
Min Max
5.7
6.7
5.7
6.7
–
0.5
–
0.5
–
1.5
–
1.0
4.3
7.3
–
1.6
135
–
1.5
–
1.25
–
9.5
10.5
2.0
–
2.0
–
85°C
Min Max
6.1
7.1
Unit Condition
ns CL = 50pF
6.0
7.0
ns CL = 50pF
–
0.5
ns CL = 50pF
–
0.5
ns CL = 50pF
–
1.5
ns CL = 50pF
–
1.0
ns CL = 50pF
4.5
7.5
ns CL = 50pF
–
1.6
ns CL = 50pF
135
–
MHz CL = 50pF
1.5
–
ns
1.25
–
ns
9.5
10.5
ns CL = 50pf
Relative 1.5V
ns
2.0
–
ns
2.0
–
MOTOROLA
2–2
MECL Data
DL122 — Rev 6
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