CY7C4808V25-166 查看數據表（PDF） - Cypress Semiconductor

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CY7C4808V25-166

2.5V 4K/16K/64K x 80 Unidirectional Synchronous FIFO w/Bus Matching

Cypress Semiconductor 

PRELIMINARY

Switching Waveforms

[6]

Master Reset Loading X and Y with a Preset Value of Eight

CLKA

CLKB

MR

BE/FWFT

RT/SPM

FS1/SEN,

FS0/SD

FF/IR

EF/OR

AE

AF

tRSTS

tRSF

tRSF

tRSF

tRSF

tBES

tSPMS

tFSS

CY7C4808V25

CY7C4806V25

CY7C4804V25

tRSTH

tBEH

tFWS

tSPMH

tFSH

tWFF

Partial Reset (CY Standard and FWFT Modes) [7]

CLKA

CLKB

PR

FF/IR

EF/OR

AE

AF

tRSTS

tRSF

tRSF

tRSF

tRSF

tRSTH

tWFF

Notes:

6. PR must be HIGH during Master Reset.

7. MR must be HIGH during Partial Reset.

10

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