PDM31532LA10T 查看數據表（PDF） - Paradigm Technology

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PDM31532LA10T

64K x 16 CMOS 3.3V Static RAM

Paradigm Technology 

PDM31532

Write Cycle 1 Timing Diagram(8) (WE Controlled)

tWC

1

ADDRESSES

tAW

tAS

tWP

tAH

2

WE

tCW

CE

3

tBW

UB, LB

tHZWE(5)

4

tLZWE(5)

DOUT

(9)

High Impedance

(10)

tDS

tDH

5

DIN

Data Stable

6

Write Cycle 2 Timing Diagram(8) (CE Controlled)

ADDRESSES

tAS

WE

CE

UB, LB

DOUT

DIN

tWC

tAW

tWP

tAH

tCW

tBW

tLZBE(5)

tLZCE(5)

tHZWE(5)

High Impedance

tDS

tDH

Data Stable

7

8

9

10

11

12

Rev. 4.3 - 3/27/98

7

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