74ACT2708 查看數據表（PDF） - Fairchild Semiconductor

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74ACT2708

64 x 9 First-In, First-Out Memory

Fairchild Semiconductor 

FIFO Expansion

Word Width Expansion

Word width can be increased by connecting the corresponding input control signals of multiple devices. Flags can be mon-

itored to obtain a composite signal by ANDing the corresponding flags.

Note: AND the corresponding flags to obtain a composite signal.

FIGURE 6. Word Width Expansion—64 x 18 FIFO

Vmi = 50% VDD for AC/ACQ devices; 1.5V for ACT/ACTQ devices

Vmo = 50% VDD for AC/ACT, ACQ/ACTQ devices

FIGURE 7. 3-STATE Output Low Enable and

Disable Times for AC/ACT, ACQ/ACTQ

Vmi = 50% VDD for AC/ACQ devices; 1.5V for ACT/ACTQ devices

Vmo = 50% VDD for AC/ACT, ACQ/ACTQ devices

FIGURE 8. 3-STATE Output High Enable and

Disable Times for AC/ACT, ACQ/ACTQ

9

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