Freescale Semiconductor, Inc.
CCLK
QX
tP(LH)
tP(HL)
VCC
VCC÷2
GND
VCC
VCC÷2
GND
Figure 8. Propagation Delay (tPD) Test Reference
MPC9447
tSK(LH)
tSK(HL)
VCC
VCC÷2
GND
VCC
VCC÷2
GND
The pin--to--pin skew is defined as the worst case difference in
propagation delay between any similar delay path within a
single device
Figure 9. Output--to--Output Skew tSK(LH, HL)
CCLK
QX
tP(LH)
tP(HL)
VCC
VCC÷2
GND
VCC
VCC÷2
GND
tSK(P) = | tPLH -- tPHL |
Figure 10. Output Pulse Skew (tSK(P)) Test Reference
tP
T0
VCC
VCC÷2
GND
DC = (tP T0 x 100%)
The time from the output controlled edge to the non--controlled
edge, divided by the time between output controlled edges,
expressed as a percentage
Figure 11. Output Duty Cycle (DC)
VCC=3.3V VCC=2.5V
2.4
1.8V
0.55
0.6V
tF
tR
Figure 12. Output Transition Time Test Reference
TN
TN+1
TJIT(CC) = |TN - TN+1|
The variation in cycle time of a signal between adjacent cycles,
over a random sample of adjacent cycle pairs
Figure 13. Cycle--to--Cycle Jitter
CCLK
PCLK
CLK_STOP
tS tH
VCC
VCC÷2
GND
VCC
VCC÷2
GND
Figure 14. Setup and Hold Time (tS, tH) Test Reference
TIMING SOLUTIONS
7
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MOTOROLA