ML66525B 查看數據表（PDF） - Oki Electric Industry
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ML66525B Datasheet PDF : 27 Pages
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OKI Semiconductor
FEDL66525-02
ML66525 Family
Slave mode (Clock synchronous serial port)
Parameter
Cycle time
Serial clock cycle time
Output data setup time
Output data hold time
Input data setup time
Input data hold time
(VDD_CORE = VDD_IO = VREF = 2.4 to 3.6 V, GND = AGND = 0 V, Ta = –30 to +70°C)
Symbol
Condition
Min.
Max.
Unit
tcyc
fOSC = 24 MHz
41.67
—
tSCKC
tSTMXS
tSTMXH
CL = 50 pF
4tcyc
—
2tφ – 30
—
ns
4tφ – 20
—
tSRMXS
tSRMXH
21
—
7
—
(Note) tφ = tcyc/2
tcyc
CPUCLK
TXC/RXC
SDOUT
(TXD)
SDIN
(RXD)
tSTMXH
tSCKC
tSTMXS
tSRMXS
tSRMXH
19/27
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