MC68HC705J1AC 查看數據表（PDF） - Freescale Semiconductor

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MC68HC705J1AC

Microcontrollers

Freescale Semiconductor 

Memory

2.3 Memory Map

$0000

↓

$001F

$0020

↓

$00BF

$00C0

↓

$00FF

$0100

↓

$02FF

$0300

↓

$07CF

$07D0

↓

$07ED

$07EE

$07EF

$07F0

↓

$07FF

Port A Data Register (PORTA)

Port B Data Register (PORTB)

Unimplemented

Data Direction Register A (DDRA)

Data Direction Register B (DDRB)

Unimplemented

I/O Registers

32 Bytes

Timer Status and Control Register (TSCR)

Timer Control Register (TCR)

IRQ Status and Control Register (ISCR)

Unimplemented

Unimplemented

160 Bytes

Pulldown Register Port A (PDRA)

Pulldown Register Port B (PDRB)

RAM

64 Bytes

Unimplemented

Unimplemented

512 Bytes

EPROM Programming Register (EPROG)

Unimplemented

EPROM

1232 Bytes

Unimplemented

30 Bytes

Reserved

COP Register (COPR)(1)

Mask Option Register (MOR)

Test ROM

2 Bytes

Reserved

Registers and EPROM

16 Bytes

Timer Interrupt Vector High

Timer Interrupt Vector Low

External Interrupt Vector High

External Interrupt Vector Low

Software Interrupt Vector High

Software Interrupt Vector Low

Reset Vector High

(1) Writing to bit 0 of $07F0 clears the computer

operating properly (COP) watchdog.

Reset Vector Low

Figure 2-1. Memory Map

$0000

$0001

$0002

$0003

$0004

$0005

$0006

$0007

$0008

$0009

$000A

$000B

↓

$000F

$0010

$0011

$0012

↓

$0017

$0018

$0019

↓

$001E

$001F

$07F0

$07F1

$07F2

↓

$07F7

$07F8

$07F9

$07FA

$07FB

$07FC

$07FD

$07FE

$07FF

Technical Data

34

Memory

MC68HC705J1A — Rev. 4.0

MOTOROLA

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