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MC33560DW 查看數據表(PDF) - ON Semiconductor

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MC33560DW Datasheet PDF : 26 Pages
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MC33560
ELECTRICAL CHARACTERISTICS (continued) These specifications are written in the same style as common for standard
integrated circuits. The convention considers current flowing into the pin (sink current) as positive and current flowing out of the pin
(source current) as negative. (Conditions: VBAT = 4.0 V, VCC = 5.0 V nom, PWRON = VBAT , Operating Mode, −ICC = 10 mA, −25°C TA
85°C, L1 = 47 mH, RLIM = 0 W, CRDVCC capacitor = 10 mF, unless otherwise noted.)
Characteristic
Test Conditions
Symbol Min
Typ
Max
Unit
DIGITAL DYNAMIC SECTION (VBAT = 5.0 V, Normal Operating Mode) (Note 6)
Card Detection Filter Time:
Card Insertion
Card Extraction
tfltin
50
150
ms
tfltout
50
150
ms
Internal Reset Delay
RES, VCC Powerup / Powerdown
tdres
20
ms
Ready Delay Time
Pin 4
tdrdy
2.0
ms
PWRON low Pulse Width
CS = L, Pin 2
twon
2.0
ms
DIGITAL DYNAMIC SECTION (VBAT = 5.0 V, programming mode) (Note 6)
Data Setup Time
RDYMOD, PWRON, RESET, IO
Pins 2, 4, 6, 7
tsmod
1.0
ms
Data Hold Time
RDYMOD, PWRON, RESET, IO
Pins 2, 4, 6, 7
thmod
1.0
ms
CS low Pulse Width
Pin 5
twcs
2.0
ms
4. See Figures 2 and 3.
5. The transistors T1 on lines IO, C4 and C8 (see Figure 24) have a max Rdson of 250 W.
6. Pin loading = 30 pF, except INVOUT = 15 pF.
7. As the clock buffer is optimized for low power consumption and hence not symmetrical, clock signal duty cycle is guaranteed for divide
by 2 and divide by 4 ratio.
8. In either direction.
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