MC100EP131FAG 查看數據表（PDF） - ON Semiconductor

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MC100EP131FAG

3.3V / 5V ECL Quad D Flip−Flop with Set, Reset, and Differential Clock

ON Semiconductor 

MC10EP131, MC100EP131

800

700

600

500

400

300

200

100

ÉÉÉÉÉÉÉ(JITTER)

ÉÉÉÉÉÉÉ 0

0

1000

2000

3000

4000

5000

FREQUENCY (MHz)

Figure 4. Frequency vs. VOUTpp and JITTER

8

7

6

5

4

23ÉÉÉÉ

1

6000

Q

Driver

Device

Q

Zo = 50 W

Zo = 50 W

50 W

50 W

D

Receiver

Device

D

VTT

VTT = VCC − 2.0 V

Figure 5. Typical Termination for Output Driver and Device Evaluation

(See Application Note AND8020/D − Termination of ECL Logic Devices.)

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8

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