MC100EP105MNG 查看數據表（PDF） - ON Semiconductor

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MC100EP105MNG

3.3V / 5V ECL Quad 2−Input Differential AND/NAND

ON Semiconductor 

MC10EP105, MC100EP105

ORDERING INFORMATION

Device

Package

Shipping†

MC10EP105FA

LQFP−32

250 Units / Tray

MC10EP105FAG

LQFP−32

(Pb−Free)

250 Units / Tray

MC10EP105FAR2

LQFP−32

2000 / Tape & Reel

MC10EP105FAR2G

LQFP−32

(Pb−Free)

2000 / Tape & Reel

MC100EP105FA

LQFP−32

250 Units / Tray

MC100EP105FAG

LQFP−32

(Pb−Free)

250 Units / Tray

MC100EP105FAR2

LQFP−32

2000 / Tape & Reel

MC100EP105FAR2G

LQFP−32

(Pb−Free)

2000 / Tape & Reel

MC10EP105MNG

74 Units / Rail

MC100EP105MNG

MC10EP105MNR4G

QFN−32

(Pb−Free)

74 Units / Rail

1000 / Tape & Reel

MC100EP105MNR4G

1000 / Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

Resource Reference of Application Notes

AN1405/D − ECL Clock Distribution Techniques

AN1406/D − Designing with PECL (ECL at +5.0 V)

AN1503/D − ECLinPSt I/O SPiCE Modeling Kit

AN1504/D − Metastability and the ECLinPS Family

AN1568/D − Interfacing Between LVDS and ECL

AN1672/D − The ECL Translator Guide

AND8001/D − Odd Number Counters Design

AND8002/D − Marking and Date Codes

AND8020/D − Termination of ECL Logic Devices

AND8066/D − Interfacing with ECLinPS

AND8090/D − AC Characteristics of ECL Devices

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