MC100EL14 查看數據表（PDF） - ON Semiconductor
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MC100EL14 Datasheet PDF : 9 Pages
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MC100EL14
VCC EN VCC NC SCLK CLK CLK VBB SEL VEE
20 19 18 17 16 15 14 13 12 11
10
D
Q
1 2 3 4 5 6 7 8 9 10
Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3 Q4 Q4
* All VCC pins are tied together on the die.
Warning: All VCC and VEE pins must be externally connected to
Power Supply to guarantee proper operation.
Figure 1. Logic Diagram and Pinout Assignment
Table 1. PIN DESCRIPTION
PIN
FUNCTION
CLK, CLK
ECL Diff Clock Inputs
SCLK
ECL Scan Clock Input
EN
ECL Sync Enable
SEL
ECL Clock Select Input
Q0−4, Q0−4
VBB
VCC
VEE
NC
ECL Diff Clock Outputs
Reference Voltage Output
Positive Supply
Negative Supply
No Connect
Table 2. FUNCTION TABLE
CLK*
SCLK*
SEL*
EN*
L
X
L
L
H
X
L
L
X
L
H
L
X
H
H
L
X
X
X
H
1. On next negative transition of CLK or SCLK
**Pins will default low when left open.
Q
L
H
L
H
L
(Note )
Table 3. ATTRIBUTES
Characteristics
Value
Internal Input Pulldown Resistor
75 kW
Internal Input Pullup Resistor
75 kW
ESD Protection
Human Body Model
Machine Model
Charge Device Model
> 2 kV
> 200 V
> 4 kV
Moisture Sensitivity (Note 2)
Pb
Pb−Free
Level 1
Level 3
Flammability Rating
Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in
Transistor Count
303 Devices
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
2. For additional Moisture Sensitivity information, refer to Application Note AND8003/D.
http://onsemi.com
3
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