DC and AC parameters
Figure 11. FWH interface AC signal timing waveforms
M50FW040
CLK
tCHQV
FWH0-FWH3
VALID OUTPUT DATA
tCHQZ
tCHQX
FLOAT OUTPUT DATA
tDVCH
tCHDX
VALID
VALID INPUT DATA
AI03405
Table 20. FWH interface AC signal timing characteristics
Symbol PCI Symbol
Parameter
Test Condition
Value
Unit
tCHQV
tval
CLK to Data Out
Min
2
ns
Max
11
ns
tCHQX(1)
ton
CLK to Active (Float to Active Delay)
Min
2
ns
tCHQZ
toff
CLK to Inactive (Active to Float Delay)
Max
28
ns
tAVCH
tDVCH
tsu
Input Set-up Time(2)
Min
7
ns
tCHAX
tCHDX
th
Input Hold Time(2)
Min
0
ns
1. The timing measurements for Active/Float transitions are defined when the current through the pin equals the leakage
current specification.
2. Applies to all inputs except CLK.
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