LTC488/LTC489
TEST CIRCUITS
100pF
A
D
DRIVER
54Ω
100pF
RECEIVER
B
RO
CL
4889 F01
Figure 1. Receiver Timing Test Circuit
Note: The input pulse is supplied by a generator having the following characteristics:
f = 1MHz, Duty Cycle = 50%, tr < 10ns, tf ≤ 10ns, ZOUT = 50Ω
RECEIVER
OUTPUT
S1
1k
VCC
CL
1k
S2
4889 F02
Figure 2. Receiver Enable and Disable Timing Test Circuit
SWITCHING TIME WAVEFORMS
VOD2
INPUT
A, B
–VOD2
VOH
RO
VOL
INPUT
f = 1MHz; tr ≤ 10ns; tf ≤ 10ns
0V
tPHL
0V
tPLH
1.5V
1.5V
4889 F03
Figure 3. Receiver Propagation Delays
3V
EN OR
EN12
0V
5V
RO
VOL
VOH
RO
0V
f = 1MHz; tr ≤ 10ns; tf ≤ 10ns
1.5V
1.5V
tZL
tLZ
1.5V OUTPUT NORMALLY LOW
tZH
tHZ
OUTPUT NORMALLY HIGH
1.5V
Figure 4. Receiver Enable and Disable Times
0.5V
0.5V
4889 F04
6
4889fb