LTC1098L 查看數據表（PDF） - Linear Technology

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LTC1098L

Micropower Sampling 8-Bit Serial I/O A/D Converters

Linear Technology 

LTC1096/LTC1096L

LTC1098/LTC1098L

AC CHARACTERISTICS

LTC1096/LTC1098

The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.

VCC = 3V, VREF = 2.5V, fCLK = 250kHz, unless otherwise noted.

SYMBOL PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

tSMPL

fSMPL(MAX)

tCONV

tdDO

tdis

ten

thDO

tf

tr

CIN

Analog Input Sample Time

Maximum Sampling Frequency

Conversion Time

Delay Time, CLK↓ to DOUT Data Valid

Delay Time, CS↑ to DOUT Hi-Z

Delay Time, CLK↓ to DOUT Enable

Time Output Data Remains Valid After CLK↓

DOUT Fall Time

DOUT Rise Time

Input Capacitance

See Operating Sequence

See Operating Sequence

See Test Circuits (Note 9)

See Test Circuits (Note 9)

See Test Circuits (Note 9)

CLOAD = 100pF

See Test Circuits (Note 9)

See Test Circuits (Note 9)

Analog Inputs On Channel

Analog Inputs Off Channel

l 16.5

l

l

l

l

l

1.5

CLK Cycles

kHz

8

CLK Cycles

500

1000

ns

220

800

ns

160

480

ns

400

ns

70

250

ns

50

150

ns

25

pF

5

pF

Digital Input

5

pF

LTC1096L/LTC1098L

The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.

VCC = 2.65V, VREF = 2.5V, fCLK = 250kHz, unless otherwise noted.

SYMBOL PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

tSMPL

fSMPL(MAX)

tCONV

tdDO

tdis

ten

thDO

Analog Input Sample Time

Maximum Sampling Frequency

Conversion Time

Delay Time, CLK↓ to DOUT Data Valid

Delay Time, CS↑ to DOUT Hi-Z

Delay Time, CLK↓ to DOUT Enable

Time Output Data Remains Valid After CLK↓

See Operating Sequence

See Operating Sequence

See Test Circuits

See Test Circuits

See Test Circuits

CLOAD = 100pF

l 16.5

l

l

l

1.5

CLK Cycles

kHz

8

CLK Cycles

500

1000

ns

220

800

ns

160

480

ns

400

ns

tf

DOUT Fall Time

tr

DOUT Rise Time

CIN

Input Capacitance

See Test Circuits

l

See Test Circuits

l

Analog Inputs On Channel

Analog Inputs Off Channel

70

250

ns

50

200

ns

25

pF

5

pF

Digital Input

5

pF

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: All voltage values are with respect to GND.

Note 3: For the 8-lead PDIP, consult the factory.

Note 4: Linearity error is specified between the actual and points of the

A/D transfer curve.

Note 5: Total unadjusted error includes offset, full scale, linearity,

multiplexer and hold step errors.

Note 6: Two on-chip diodes are tied to each reference and analog input

which will conduct for reference or analog input voltages one diode

drop below GND or one diode drop above VCC. This spec allows 50mV

forward bias of either diode. This means that as long as the reference or

analog input does not exceed the supply voltage by more than 50mV, the

output code will be correct. To achieve an absolute 0V to 5V input voltage

range will therefore require a minimum supply voltage of 4.950V over

initial tolerance, temperature variations and loading. For 5.5V < VCC ≤ 9V,

reference and analog input range cannot exceed 5.55V. If reference and

analog input range are greater than 5.55V, the output code will not be

guaranteed to be correct.

Note 7: The supply voltage range for the LTC1096L/LTC1098L is from

2.65V to 4V. The supply voltage range for the LTC1096 is from 3V to 9V,

but the supply voltage range for the LTC1098 is only from 3V to 6V.

Note 8: Channel leakage current is measured after the channel selection.

Note 9: These specifications are either correlated from 5V specifications or

guaranteed by design.

10968fc

8

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