LT3640 查看數據表（PDF） - Linear Technology

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LT3640

Dual Monolithic Buck Regulator with Power-On Reset and Watchdog Timer

Linear Technology 

LT3640

Applications Information

pull-ups eliminate the need for external pull-ups when

the rise time of these pins is not critical. The open-drain

configuration allows wired-OR connections.

The two power-on reset timers share one oscillator. The

power-on reset timeout period, t RST (64 cycles on the

CPOR pin), which is the same for the two channels, can

be programmed by connecting a capacitor, CPOR, between

the CPOR pin and ground:

tRST

=

CPOR

•

37

•

106





s

F 

For example, using a capacitor value of 8.2nF gives a

303ms reset timeout period. The accuracy of t RST will be

limited by the accuracy and temperature coefficient of the

capacitor CPOR. Extra parasitic capacitance on the CPOR

pin, such as probe capacitance, can affect t RST.

Watchdog

The WDE pin is the enable pin for the watchdog. As soon

as both RST1 and RST2 are released, the watchdog starts

a delay period, tDLY, during which the input signal at the

WDI pin is ignored for higher reliability. After the delay

period, the watchdog starts detecting falling edges on the

WDI pin. If the time between any two WDI falling edges is

shorter than the watchdog lower boundary, tWDL, or longer

than the watchdog upper boundary, tWDU, the WDO pin

is pulled down for a period of t RST, which is the same as

the power-on reset timeout period. When the WDO pin is

released, the watchdog again starts the delay period.

The WDO is open-drain output with weak internal pull-up,

similar to the RST pins.

The delay period corresponding to 33 cycles on CWDT, the

watchdog lower boundary (4 cycles on CWDT), and the

watchdog upper boundary (64 cycles on CWDT) are all

related and set by a capacitor, CWDT, between the CWDT

pin and ground:

tDLY

=

t WDU

•





33

6 4 

t WDL

=

t WDU

16

t WDU

=

C WDT

•

37

•

106





s

F 

The accuracy of the watchdog timer will be limited by

the accuracy and temperature coefficient of the capacitor

CWDT. Extra parasitic capacitance on the CWDT pin, such

as probe capacitance, can affect the watchdog timer.

CWDT

CPOR

FB2

FB1

RST1

RST2

WD STARTS

64 CYCLES 64 CYCLES

20ms/DIV

(9a)

3640 F09a

CWDT

CPOR

WDI

WDO

1ms/DIV

(9b)

3640 F09b

CWDT

CPOR

WDI

WDO

50ms/DIV

(9c)

3640 F09c

Figure 9. Power-On Reset and Watchdog Timing

3640f

19

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