【Note 7-4】HCYC = HSYNC Period(VGA:Typ.648CLK, QVGA:Typ.324CLK)
【Note 7-5】VSYNC,HSYNC,CLK,R0~R5,G0~G5,B0~B5,DEN terminals are applied.
LCP-06008A-8
tRISE1
Input Signal 0.1VDD
0.9VDD
tFALL1
0.9VDD
0.1VDD
【Fig 7-1 Input Signal Rising/Falling Timing】
【Note 7-6】INI,RESB terminals are applied.
tRISE2
Input Signal 0.1VDD
0.9VDD
tFALL2
0.9VDD
0.1VDD
【Fig 7-2 Input Signal Rising/Falling Timing】
【Note 7-7】Reset Signal Timing chart
RESB
tRESW
【Fig 7-3 Reset Timing Signal】
7-3)Power consumption
Measurement condition : Vsync=59.94Hz,Hsync=38.84kHz,CLK=25.17MHz,Ta=25℃ (VGA Mode)
Table 7
(when conventional scan mode)
Parameter
Sym Conditions MIN TYP MAX Unit Remarks
VSHD Total(Digital+Analog) ISHD VSHD=+3.3V -
45
75 mA 【Note7-8】
【Note 7-8】White Pattern