KB2502
Preliminary
VIDEO AMP MERGED OSD PROCESSOR FOR MONITORS
FUNCTIONAL DESCRIPTIONS
DATA TRANSMISSION
The interface between KB2502 and MCU follows the I2C protocol. After the starting pulse, the transmission takes
place in the following order: Slave address with R/W bit, 2-byte register address, 2-byte data, and stop condition.
an acknowledge signal is received for each byte, excluding only the start/stop condition. The 2-byte register
address is composed of an 8-bit row address, and an 8-bit column address. The order of transmission for a 2-byte
register address is 'Row address → Column address'. The 2 bytes of data is because KB2502 has a 16-bit base
register configuration. KB2502's slave address is BAh. It is BBh in read mode, and BAh in write mode.
• Address Bit Pattern for Display Registers Data
(a) row address bit pattern
R3 - R0: Valid data for row address
A15
A14
A13
A12
A11
A10
A9
A8
X
X
X
X
R3
R2
R1
R0
(b) Column address bit pattern
C4 - C0: Valid data for column address
A7
A6
A5
A4
A3
A2
A1
A0
X
X
X
C4
C3
C2
C1
C0
X:Don't care bit
• Data Transmission Format
Start → Slave address → ACK → Row address → ACK → Column address → ACK
Data byte N → ACK → Data byte N+1 → ACK → Stop
Figure 5. Data Transmission Format at Writing Operation
Start → Slave address → ACK → Row address → ACK → Column address → ACK → Stop
Start → Slave address → ACK → Data byte N → ACK → Data byte N+1 → ACK → Stop
Figure 6. Data Transmission Format at Reading Operation
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