DC to DC Synchronous Converter Design
Abdus Sattar, IXYS Corporation
IXAN0068
I DRIVER( H −L)
=
VDD − VSP
R + R DRIVER( PULL−DOWN )
Gate
= 10 − 3.35 = 1.58A
2.2 + 2
The rise time is, tt(on) = 26nS + 10nS = 36nS
The fall time is, tt(off ) = 18ns + 10nS = 28nS
High-Side MOSFET loss (Q1=IXTA90N055T2):
The conduction loss is,
PCond _ Q1
=
I
2
O
•
RDS (on)
•D
= 122 • 0.0084 • 0.275 = 0.332 = 332mW
The Gate-Charge losses: (assume fs = 200 kHz)
PGC _ Q1 = VGS • Qg • f s = 10.0x42x10−9 x200x103 = 84mW
And estimated switching loss is,
Pt = [VDS (max){I DS (on) • tt (on) + I DS (off ) • tt(off ) } • f s ]
2
= 12 •12 • (36 + 28)x10−9 x200x103 = 0.921W=921mW
2
Total high-side losses: 332mW+84mW+921mW = 1337mW=1.337W
Low-Side MOSFET loss (Q2):
The conduction loss is,
PCond _ Q2
=
I
2
O
• RDS (on)
• (1 −
D)
= 122 • 0.0084 • 0.725 = 0.877W = 877mW
The Gate-Charge loss:
PGC _ Q1 = VGS • Qg • f s = 10.0x42x10−9 x200x103 = 84mW
Total low-side losses: 877mW+84mW =961mW
ISL6594D Driver loss:
From datasheet: VDD = 5V
Table 6: IXS839 Driver Output Stage from datasheet
Driver pull up resistance
RDRIVER(PULL_UP)
3.0 Ω
Driver pull down resistance RDRIVER(PULL_DOWN) 2.2 Ω
Driver gate resistance
RGATE
2Ω
9