IS93C56A-2PI 查看數據表（PDF） - Integrated Silicon Solution

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IS93C56A-2PI

2K-BIT/4K-BIT SERIAL ELECTRICALLY ERASABLE PROM

Integrated Silicon Solution 

IS93C56A IS93C66A

AC WAVEFORMS

FIGURE 6. WRITE ALL (WRALL) CYCLE TIMING

CS

DIN

10 0 0 1

DOUT

tCS

Dm

D0

tSV

BUSY READY

tWP

Notes:

1. After the completion of the instruction (DOUT is in READY status) then it may perform another instruction. If device is in BUSY status

(DOUT indicates BUSY status) then attempting to perform another instruction could cause device malfunction.

2. To determine data bits Dm-D0, see Instruction Set for the appropriate device.

FIGURE 7. WRITE DISABLE (WDS) CYCLE TIMING

tCS

CS

DIN

10 0 0 0

DOUT = 3-STATE

Integrated Silicon Solution, Inc. — www.issi.com

11

Rev. C

05/08/07

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