IS61NLP102436A-166TQL 查看數據表（PDF） - Integrated Silicon Solution

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IS61NLP102436A-166TQL

1Mb x 36 and 2Mb x 18 36Mb, PIPELINE 'NO WAIT' STATE BUS SRAM

Integrated Silicon Solution 

IS61NLP102436A/IS61NVP102436A

IS61NLP204818A/IS61NVP204818A

BLOCK DIAGRAM

x 36: A [0:19] or

x 18: A [0:20]

ADDRESS

REGISTER

A2-A19 or A2-A20

MODE

A0-A1

BURST

ADDRESS

COUNTER

A'0-A'1

CLK

CKE

CONTROL

LOGIC K

CE

CE2

CE2

} ADV

WE

BWŸX

(X=a,b,c,d or a,b)

OE

ZZ

CONTROL

REGISTER

DQx/DQPx

WRITE

ADDRESS

REGISTER

WRITE

ADDRESS

REGISTER

CONTROL

LOGIC

36 or 18

1Mx36;

2Mx18

MEMORY ARRAY

K DATA-IN

REGISTER

K DATA-IN

REGISTER

K OUTPUT

REGISTER

BUFFER

2

Integrated Silicon Solution, Inc. — www.issi.com

Rev. A

09/13/07

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