CA5160E 查看數據表（PDF） - Intersil

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CA5160E

4MHz, BiMOS Microprocessor Operational Amplifiers with MOSFET Input/CMOS Output

Intersil 

CA5160

Electrical Specifications TA = 25oC, V+ = 15V, V- = 0V, Unless Otherwise Specified (Continued)

PARAMETER

SYMBOL

TEST

CONDITIONS

CA5160

MIN

TYP

MAX UNITS

Maximum Output

Current

Supply Current

IOM+ (Source)

IOM- (Sink)

Input Offset Voltage Temperature Drift

IO

VO = 0V

VO = 15V

I+

RL = ∞, VO = 7.5V

RL = ∞, VO = 0V

∆VIO/∆T

12

22

45

12

20

45

-

10

15

-

2

3

-

8

-

Electrical Specifications For Design Guidance, At TA = 25oC, VSUPPLY = ±7.5V, Unless Otherwise Specified

TYPICAL

VALUES

PARAMETER

SYMBOL

TEST CONDITIONS

CA5160

Input Offset Voltage Adjustment Range

10kΩ Across Terminals 4 and 5 or 4 and 1

±22

Input Resistance

RI

1.5

Input Capacitance

CI

f = 1MHz

4.3

Equivalent Input Noise Voltage

eN

BW = 0.2MHz, RS = 1MΩ

40

BW = 0.2MHz, RS = 10MΩ

50

Equivalent Input Noise Voltage

eN

RS = 100Ω, 1kHz

72

RS = 100Ω, 10kHz

30

Unity Gain Crossover Frequency

fT

4

Slew Rate

SR

10

Transient Response

Rise Time

tR

CC = 25pF, RL = 2kΩ (Voltage Follower)

0.09

Overshoot

OS

10

Settling Time (To <0.1%, VIN = 4VP-P)

tS

CC = 25pF, RL = 2kΩ, (Voltage Follower)

1.8

mA

mA

mA

mA

µV/oC

UNITS

mV

TΩ

pF

µV

µV

nV/√Hz

nV/√Hz

MHz

V/µs

µs

%

µs

Block Diagram

+

3

INPUT

2

-

200µA

1.35mA

BIAS CKT.

200µA

AV ≈ 5X

AV ≈

6000X

8mA

(NOTE 5)

0mA

(NOTE 6)

7 V+

NOTE:

5. Total supply voltage (for indicated voltage

gains) = 15V with input terminals biased so

that Terminal 6 potential is +7.5V above

Terminal 4.

6. Total supply voltage (for indicated voltage

gains) = 15V with output terminal driven to

either supply rail.

AV ≈ 30X

OUTPUT

6

51

OFFSET

NULL

CC

COMPENSATION

(WHEN DESIRED)

4 V-

8

STROBE

3-4

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