IPDH4N03LA 查看數據表（PDF） - Infineon Technologies
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IPDH4N03LA Datasheet PDF : 9 Pages
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IPDH4N03LA G IPSH4N03LA G
Parameter
Symbol Conditions
min.
Values
typ.
Unit
max.
Thermal characteristics
Thermal resistance, junction - case R thJC
-
SMD version, device on PCB
R thJA minimal footprint
-
6 cm2 cooling area5)
-
-
1.6 K/W
-
75
-
50
Electrical characteristics, at T j=25 °C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage
V (BR)DSS V GS=0 V, I D=1 mA
25
-
Gate threshold voltage
V GS(th) V DS=V GS, I D=40 µA
1.2
1.6
Zero gate voltage drain current
I DSS
V DS=25 V, V GS=0 V,
T j=25 °C
-
0.1
-V
2
1 µA
Gate-source leakage current
Drain-source on-state resistance
Gate resistance
Transconductance
V DS=25 V, V GS=0 V,
T j=125 °C
-
I GSS
V GS=20 V, V DS=0 V
-
R DS(on) V GS=4.5 V, I D=50 A
-
V GS=4.5 V, I D=50 A,
-
SMD version
V GS=10 V, I D=60 A
-
V GS=10 V, I D=60 A,
-
SMD version
RG
-
g fs
|V DS|>2|I D|R DS(on)max,
I D=60 A
45
10
100
10
100 nA
6.1
7.6 mΩ
5.9
7.4
3.7
4.4
3.5
4.2
1.3
-Ω
90
-S
1) J-STD20 and JESD22
1) Current is limited by bondwire; with an R thJC=1.6 K/W the chip is able to carry 109 A.
3) See figure 3
4) T j,max=150 °C and duty cycle D <0.25 for V GS<-5 V
5) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
Rev. 0.92 - target data sheet
page 2
2004-10-27
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