IDT82V3380 查看數據表（PDF） - Integrated Device Technology

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IDT82V3380

SYNCHRONOUS ETHERNET WAN PLL

Integrated Device Technology 

IDT82V3380

SYNCHRONOUS ETHERNET WAN PLL

Table 1: Pin Description (Continued)

Name

Pin No.

OUT2

89

OUT3

90

OUT4

93

OUT5

94

OUT6_POS

34

OUT6_NEG

35

OUT7_POS

36

OUT7_NEG

37

OUT8_POS

28

OUT8_NEG

27

OUT9

95

CS

70

INT_REQ

8

I/O

O

O

O

O

O

O

O

O

I

pull-up

O

Type

Description 1

CMOS

OUT2: Output Clock 2

A 1 Hz, 400 Hz, 2 kHz, 8 kHz, 64 kHz, N x E1 4, N x T1 5, N x 13.0 MHz 6, N x 3.84 MHz 7,

5 MHz, 10 MHz, 20 MHz, E3, T3, 6.48 MHz, 19.44 MHz, 25.92 MHz, 38.88 MHz, 51.84 MHz,

77.76 MHz or 155.52 MHz clock is output on this pin.

CMOS

OUT3: Output Clock 3

A 1 Hz, 400 Hz, 2 kHz, 8 kHz, 64 kHz, N x E1 4, N x T1 5, N x 13.0 MHz 6, N x 3.84 MHz 7,

5 MHz, 10 MHz, 20 MHz, 25 MHz, E3, T3, 6.48 MHz, 19.44 MHz, 25.92 MHz, 38.88 MHz,

51.84 MHz, 77.76 MHz, 125 MHz, 155.52 MHz, 156.25 MHz or 312.5 MHz clock is output on

this pin.

CMOS

OUT4: Output Clock 4

A 1 Hz, 400 Hz, 2 kHz, 8 kHz, 64 kHz, N x E1 4, N x T1 5, N x 13.0 MHz 6, N x 3.84 MHz 7,

5 MHz, 10 MHz, 20 MHz, E3, T3, 6.48 MHz, 19.44 MHz, 25.92 MHz, 38.88 MHz, 51.84 MHz,

77.76 MHz or 155.52 MHz clock is output on this pin.

CMOS

OUT5: Output Clock 5

A 1 Hz, 400 Hz, 2 kHz, 8 kHz, 64 kHz, N x E1 4, N x T1 5, N x 13.0 MHz 6, N x 3.84 MHz 7,

5 MHz, 10 MHz, 20 MHz, E3, T3, 6.48 MHz, 19.44 MHz, 25.92 MHz, 38.88 MHz, 51.84 MHz,

77.76 MHz or 155.52 MHz clock is output on this pin.

OUT6_POS / OUT6_NEG: Positive / Negative Output Clock 6

A 1 Hz, 400 Hz, 2 kHz, 8 kHz, 64 kHz, N x E1 4, N x T1 5, N x 13.0 MHz 6, N x 3.84 MHz 7,

PECL/LVDS 5 MHz, 10 MHz, 20 MHz, E3, T3, 6.48 MHz, 19.44 MHz, 25.92 MHz, 38.88 MHz, 51.84 MHz,

77.76 MHz, 155.52 MHz, 311.04 MHz or 622.08 MHz clock is differentially output on this pair

of pins.

OUT7_POS / OUT7_NEG: Positive / Negative Output Clock 7

A 1 Hz, 400 Hz, 2 kHz, 8 kHz, 64 kHz, N x E1 4, N x T1 5, N x 13.0 MHz 6, N x 3.84 MHz 7,

PECL/LVDS 5 MHz, 10 MHz, 20 MHz, 25 MHz, E3, T3, 6.48 MHz, 19.44 MHz, 25.92 MHz, 38.88 MHz,

51.84 MHz, 77.76 MHz, 125 MHz, 155.52 MHz, 156.25 MHz, 311.04 MHz, 312.5 MHz or

622.08 MHz clock is differentially output on this pair of pins.

OUT8_POS / OUT8_NEG: Positive / Negative Output Clock 8

AMI A 64 kHz + 8 kHz or 64 kHz + 8 kHz + 0.4 kHz composite clock is differentially output on this

pair of pins.

CMOS

OUT9: Output Clock 9

A 1.544 MHz (SONET) / 2.048 MHz (SDH) BITS/SSU clock is output on this pin.

Microprocessor Interface

CMOS

CMOS

CS: Chip Selection

A transition from high to low must occur on this pin for each read or write operation and this

pin should remain low until the operation is over.

INT_REQ: Interrupt Request

This pin is used as an interrupt request. The output characteristics are determined by the

HZ_EN bit (b1, 0CH) and the INT_POL bit (b0, 0CH).

Pin Description

15

May 19, 2009

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