IDT82V2088(2008) 查看數據表（PDF） - Integrated Device Technology

零件编号

产品描述 (功能)

生产厂家

IDT82V2088
(Rev.:2008)

OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT

Integrated Device Technology 

OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT

INDUSTRIAL

TEMPERATURE RANGES

3.2.4 TRANSMIT PATH LINE INTERFACE

The transmit line interface consists of TTIPn pin and TRINGn pin. The

impedance matching can be realized by the internal impedance matching

circuit or the external impedance matching circuit. If T_TERM[2] is set to

‘0’, the internal impedance matching circuit will be selected. In this case,

the T_TERM[1:0] bits (TERM, 1AH...) can be set to choose 75 Ω, 100 Ω,

110 Ω or 120 Ω internal impedance of TTIPn/TRINGn. If T_TERM[2] is set

to ‘1’, the internal impedance matching circuit will be disabled. In this case,

the external impedance matching circuit will be used to realize the imped-

ance matching. For T1/J1 mode, the external impedance matching circuit

for the transmitter is not supported. Figure-9 shows the appropriate external

components to connect with the cable for one channel. Table-14 is the list

of the recommended impedance matching for transmitter.

The TTIPn/TRINGn can be turned into high impedance globally by pull-

ing THZ pin to high or individually by setting the THZ bit (TCF1, 03H...) to

‘1’. In this state, the internal transmit circuits are still active.

Besides, in the following cases, TTIPn/TRINGn will also become high

impedance:

• Loss of MCLK: all TTIPn/TRINGn pins become high impedance;·

• Loss of TCLKn: corresponding TTIPn/TRINGn become HZ (excep-

tions: Remote Loopback; Transmit internal pattern by MCLK);

• Transmit path power down;

• After software reset; pin reset and power on.

Table-14 Impedance Matching for Transmitter

Cable Configuration

E1/75 Ω

E1/120 Ω

Internal Termination

T_TERM[2:0]

PULS[3:0]

RT

000

0000

0Ω

001

0001

T1/0~133 ft

010

0010

T1/133~266 ft

0011

T1/266~399 ft

0100

T1/399~533 ft

0101

T1/533~655 ft

0110

J1/0~655 ft

011

0111

0 dB LBO

010

1000

-7.5 dB LBO

1001

-15.0 dB LBO

1010

-22.5 dB LBO

1011

Note: The precision of the resistors should be better than ± 1%

3.2.5 TRANSMIT PATH POWER DOWN

The transmit path can be powered down individually by setting the

T_OFF bit (TCF0, 02H...) to ‘1’. In this case, the TTIPn/TRINGn pins are

turned into high impedance.

T_TERM[2:0]

1XX

-

External Termination

PULS[3:0]

0001

0001

-

RT

9.4 Ω

-

21

Share Link: