IDT71V3556S200PFI 查看數據表（PDF） - Integrated Device Technology

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IDT71V3556S200PFI

128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter Pipelined Outputs

Integrated Device Technology 

IDT71V3556, IDT71V3558, 128K x 36, 256K x 18, 3.3V Synchronous SRAMS with

ZBT™ Feature, 3.3V I/O, Burst Counter, and Pipelined Outputs

Commercial and Industrial Temperature Ranges

Functional Block Diagram

LBO

Address A [0:16]

CE1, CE2, CE2

R/W

CEN

ADV/LD

BWx

DQ

DQ

DQ

Clk

128Kx36 BIT

MEMORY ARRAY

Address

Control

DI DO

Control Logic

Clock

OE

TMS

TDI

TCK

TRST

(optional)

JTAG

(SA Version)

TDO

Mux

Sel

D

Output Register

Q

Gate

, 5281 drw 01a

Data I/O [0:31],

I/O P[1:4]

6.432

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