IDT70125S(2006) 查看數據表（PDF） - Integrated Device Technology

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IDT70125S
(Rev.:2006)

HIGH-SPEED 2K x 9 DUAL-PORT STATIC RAM WITH BUSY & INTERRUPT

Integrated Device Technology 

IDT70121/IDT70125

High-Speed 2K x 9 Dual-Port Static RAM with Busy & Interrupt

Industrial and Commercial Temperature Ranges

Description

The IDT70121/IDT70125 are high-speed 2K x 9 Dual-Port Static

RAMs. The IDT70121 is designed to be used as a stand-alone 9-bit Dual-

Port RAM or as a “MASTER” Dual-Port RAM together with the IDT70125

“SLAVE” Dual-Port in 18-bit-or-more word width systems. Using the IDT

MASTER/SLAVE Dual-Port RAM approach in 18-bit-or-wider memory

system applications results in full-speed, error-free operation without the

need for additional discrete logic.

Both devices provide two independent ports with separate control,

address, and I/O pins that permit independent, asynchronous access for

reads or writes to any location in memory. An automatic power-down

feature, controlled by CE, permits the on-chip circuitry of each port to enter

a very low standby power mode.

The IDT70121/IDT70125 utilizes a 9-bit wide data path to allow for

Data/Control and parity bits at the user’s option. This feature is especially

useful in data communications applications where it is necessary to use a

parity bit for transmission/reception error checking.

Fabricated using IDT’s CMOS high-performance technology, these

devices typically operate on only 675mW of power. Low-power (L)

versions offer battery backup data retention capability with each port

typically consuming 200µW from a 2V battery.

The IDT70121/IDT70125 devices are packaged in a 52-pin PLCC.

Pin Configurations(1,2,3)

05/27/04

INDEX

A1L 8

A2L 9

A3L 10

A4L 11

A5L 12

A6L 13

A7L 14

A8L 15

A9L 16

I/O0L 17

I/O1L 18

I/O2L 19

I/O3L 20

IDT70121/125J

J52-1(4)

52-Pin PLCC

Top View(5)

NOTES:

1. All VCC pins must be connected to power supply.

2. All GND pins must be connected to ground supply.

3. Package body is approximately .75 in x .75 in x .17 in.

4. This package code is used to reference the package diagram.

5. This text does not indicate orientation of the actual part-marking.

46 OER

45 A0R

44 A1R

43 A2R

42 A3R

41 A4R

40 A5R

39 A6R

38 A7R

37 A8R

36 A9R

35 I/O8R

34 I/O7R

.

2654 drw 02

6.242

APRIL 05, 2006

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