ICS85310AI11L 查看數據表（PDF） - Integrated Circuit Systems

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ICS85310AI11L

LOW SKEW, 1-TO-10 DIFFERENTIAL-TO-2.5V/3.3V ECL/LVPECL FANOUT BUFFER

Integrated Circuit Systems 

Integrated

Circuit

Systems, Inc.

ICS85310I-11

LOW SKEW, 1-TO-10

DIFFERENTIAL-TO-2.5V/3.3V ECL/LVPECL FANOUT BUFFER

TABLE 1. PIN DESCRIPTIONS

Number

Name

Type

Description

1

VCC

Power

Core supply pin.

2

CLK_SEL

Input

Pulldown

Clock select input. When HIGH, selects CLK1, nCLK1 inputs. When LOW,

selects CLK0, nCLK0 inputs. LVCMOS / LVTTL interface levels.

3

CLK0 Input Pulldown Non-inverting differential clock input.

4

nCLK0 Input Pullup Inverting differential clock input.

Synchronizing clock enable. When HIGH, clock outputs follow clock input.

5

CLK_EN Input Pullup When LOW, Q outputs are forced low, nQ outputs are forced high.

LVCMOS / LVTTL interface levels.

6

CLK1 Input Pulldown Non-inverting differential clock input.

7

nCLK1 Input Pullup Inverting differential clock input.

8

9, 16, 25, 32

10, 11

VEE

VCCO

nQ9, Q9

Power

Power

Output

Negative supply pin.

Output supply pins.

Differential output pair. LVPECL interface levels.

12, 13

nQ8, Q8 Output

Differential output pair. LVPECL interface levels.

14, 15

nQ7, Q7 Output

Differential output pair. LVPECL interface levels.

17, 18

nQ6, Q6 Output

Differential output pair. LVPECL interface levels.

19, 20

nQ5, Q5 Output

Differential output pair. LVPECL interface levels.

21, 22

nQ4, Q4 Output

Differential output pair. LVPECL interface levels.

23, 24

nQ3, Q3 Output

Differential output pair. LVPECL interface levels.

26, 27

nQ2, Q2 Output

Differential output pair. LVPECL interface levels.

28, 29

nQ1, Q1 Output

Differential output pair. LVPECL interface levels.

30, 31

nQ0, Q0 Output

Differential output pair. LVPECL interface levels.

NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.

TABLE 2. PIN CHARACTERISTICS

Symbol

CIN

RPULLUP

RPULLDOWN

Parameter

Input Capacitance

Input Pullup Resistor

Input Pulldown Resistor

Test Conditions

Minimum

Typical

4

51

51

Maximum

Units

pF

kΩ

kΩ

85310AYI-11

www.icst.com/products/hiperclocks.html

2

REV. E JULY 7, 2005

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