HEF4720BF 查看數據表（PDF） - Philips Electronics
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HEF4720BF Datasheet PDF : 16 Pages
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Philips Semiconductors
256-bit, 1-bit per word random access memories
Read-modify-write cycle
Read enable
hold time
Output hold time
with respect to
write pulse
Read-modify-write
cycle time
VDD
V
SYMBOL MIN. TYP. MAX.
5
0
ns
10 tRH
0
ns
15
0
ns
5
60
ns
10 tVAL2
20
ns
15
15
ns
5
1050
ns
10 tRWC
390
ns
15
270
ns
Product specification
HEF4720B
HEF4720V
January 1995
Fig.3 Read cycle timing diagram.
6
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