GS9090A 查看數據表（PDF） - Gennum -> Semtech
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GS9090A Datasheet PDF : 73 Pages
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Table 1-1: Pin Descriptions (Continued)
Pin Number Name
51
FW_EN
52
FIFO_EN
53
VCO_VDD
54
LB_CONT
55
VCO_GND
56
LF+
–
Center Pad
Timing
Type
Non
Input
Synchronous
Non
Input
Synchronous
Analog
Analog
Analog
Analog
–
Input
Power
Input
Input
Power
Input
Power
Description
CONTOL SIGNAL INPUT
Signal levels are LVCMOS / LVTTL compatible.
Used to enable or disable the noise immune flywheel of the device.
When set HIGH, the internal flywheel is enabled. This flywheel is
used in the extraction of timing signals, the generation of TRS
signals, the automatic detection of video standards, and in manual
switch line lock handling.
When set LOW, the internal flywheel is disabled. Timing based TRS
errors will not be detected.
CONTOL SIGNAL INPUT
Signal levels are LVCMOS / LVTTL compatible.
Used to enable / disable the internal FIFO.
When FIFO_EN is HIGH, the internal FIFO will be enabled. Data will
be clocked out of the device on the rising edge of the RD_CLK
input pin if the FIFO is in video mode or DVB-ASI mode.
When FIFO_EN is LOW, the internal FIFO is bypassed and parallel
data is clocked out on the rising edge of the PCLK output.
Power supply connection for Voltage-Controlled-Oscillator.
Connect to +1.8V DC.
CONTROL SIGNAL INPUT
Control voltage to fine-tune the loop bandwidth of the PLL.
Ground connection for Voltage-Controlled-Oscillator. Connect to
GND.
Loop filter component connection. Connect to pin 1 (LF-) as shown
in Typical Application Circuit (Part B) on page 68.
Connect to GND following recommendations in Recommended PCB
Footprint on page 70
GS9090A GenLINX® III 270Mb/s Deserializer
Data Sheet
34714 - 7
May 2010
11 of 73
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