GAL16LV8ZD 查看數據表（PDF） - Lattice Semiconductor
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GAL16LV8ZD Datasheet PDF : 18 Pages
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Specifications GAL16LV8ZD
AC Switching Characteristics
Over Recommended Operating Conditions
TEST
PARAM COND.1
DESCRIPTION
tpd
A Input or I/O to Combinatorial Output
tco
A Clock to Output Delay
tcf2
— Clock to Feedback Delay
tsu
— Setup Time, Input or Fdbk before Clk↑
th
— Hold Time, Input or Fdbk after Clk↑
A Maximum Clock Frequency with
External Feedback, 1/(tsu + tco)
fmax3
A Maximum Clock Frequency with
Internal Feedback, 1/(tsu + tcf)
A Maximum Clock Frequency with
No Feedback
twh
— Clock Pulse Duration, High
twl
— Clock Pulse Duration, Low
ten
B Input or I/O to Output Enabled
B OE↓ to Output Enabled
tdis
C Input or I/O to Output Disabled
C OE↑ to Output Disabled
1) Refer to Switching Test Conditions section.
2) Calculated from fmax with internal feedback. Refer to fmax Description section.
3) Refer to fmax Description section.
Capacitance (TA = 25°C, f = 1.0 MHz)
SYMBOL
C
I
CI/O
PARAMETER
Input Capacitance
I/O Capacitance
TYPICAL
8
8
UNITS
pF
pF
COM
COM
-15
-25
UNITS
MIN. MAX. MIN. MAX.
3 15 3 25 ns
2 10 2 15 ns
— 8 — 10 ns
12 — 15 — ns
0 — 0 — ns
45.5 — 33.3 — MHz
50 — 40 — MHz
62.5 — 41.6 — MHz
8 — 12 — ns
8 — 12 — ns
— 17 — 25 ns
— 16 — 20 ns
— 18 — 25 ns
— 17 — 20 ns
TEST CONDITIONS
V = 3.3V, V = 0V
CC
I
VCC = 3.3V, VI/O = 0V
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