
SUM MODE TEST TABLE I
Parameter
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
Input
Under
Test
Al
Bl
Al
Bl
A
B
A
B
A
B
Cn
SN54 / 74LS181
Other Input
Same Bit
Apply
4.5 V
Apply
GND
Bl
None
Al
None
Bl
None
Al
None
B
None
A
None
None
B
None
A
None
B
None
A
None
None
FUNCTION INPUTS: S0 = S3 = 4.5 V, S1 = S2 = M = 0 V
Other Data Inputs
Apply
4.5 V
Apply
GND
Remaining
A and B
Cn
Remaining
A and B
Cn
Cn
Remaining
A and B
Cn
Remaining
A and B
None
None
Remaining
B
Remaining
B
Remaining
B
Remaining
B
All
A
Remaining
A and B, Cn
Remaining
A and B, Cn
Remaining
A, Cn
Remaining
A, Cn
Remaining
A, Cn
Remaining
A, Cn
All
B
Output
Under
Test
Fl
Fl
Fl+1
Fl+1
P
P
G
G
Cn+4
Cn+4
Any F
or Cn+4
FAST AND LS TTL DATA
5-337