FDC37C665IR 查看數據表（PDF） - SMSC -> Microchip
零件编号
产品描述 (功能)
生产厂家
FDC37C665IR Datasheet PDF : 162 Pages
| |||
Parameter
min max
t1 PDATA Hi-Z to Command Asserted
t2 nIOR Asserted to PDATA Hi-Z
t3 nWAIT Deasserted to Command
Deasserted
0
30
0
50
60 180
t4 Command Deasserted to PDATA Hi-Z
t5 Command Asserted to PDATA Valid
t6 PDATA Hi-Z to nWAIT Deasserted
t7 PDATA Valid to nWAIT Deasserted
t8 nIOR Assertd to IOCHRDY Asserted
t9 nWRITE Deasserted to nIOR Asserted
t10 nWAIT Deasserted to IOCHRDY
Deasserted
0
0
0
0
0
24
0
60 160
t11 IOCHRDY Deasserted to nIOR
0
Deasserted
t12 nIOR Deasserted to SDATA Hi-Z (Hold
Time)
0
40
t13 PDATA Valid to SDATA Valid
0
75
t14 nWAIT Asserted to Command Asserted
0 195
t15 Time Out
10 12
t16 nWAIT Deasserted to PDATA Driven
60 190
t17 nWAIT Deasserted to nWRITE Modified
60 190
t18 SDATA Valid to IOCHRDY Deasserted
0
85
t19 Ax Valid to nIOR Asserted
40
t20 nIOR Deasserted to Ax Invalid
10 10
t21 nWAIT Asserted to nWRITE Deasserted
0 185
t22 nIOR Deasserted to nIOW or nIOR Asserted 40
t25 nWAIT Asserted to PDATA Hi-Z
60 180
t28 WRITE Deasserted to Command
1
units
ns
ns
ns
ns
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
1
2
1
1
1,2
3
1
1. nWAIT is considered to have settled after it does not transition for a minimum of 50 ns.
2. When not executing a write cycle, EPP nWRITE is inactive high.
3. 85 is true only if t7 = 0.
FIGURE 18B - EPP 1.9 DATA OR ADDRESS READ CYCLE TIMING PARAMETERS
151
Share Link: 