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AD7656BSTZ-1-RL 查看數據表(PDF) - Analog Devices

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AD7656BSTZ-1-RL Datasheet PDF : 32 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AD7656-1/AD7657-1/AD7658-1
Parameter
LOGIC OUTPUTS
Output High Voltage (VOH)
Output Low Voltage (VOL)
Floating-State Leakage Current
Floating-State Output Capacitance3
Output Coding
CONVERSION RATE
Conversion Time
Track-and-Hold Acquisition Time2, 3
Throughput Rate
POWER REQUIREMENTS
VDD
VSS
AVCC
DVCC
VDRIVE
ITOTAL 4
Normal Mode—Static
Normal Mode—Operational
ISS (Operational)
IDD (Operational)
Partial Power-Down Mode
Full Power-Down Mode (STBY Pin)
Power Dissipation
Normal Mode—Static
Normal Mode—Operational
Partial Power-Down Mode
Full Power-Down Mode (STBY Pin)
B Version1 Y Version1 Unit
Test Conditions/Comments
VDRIVE − 0.2 VDRIVE − 0.2
0.2
0.2
±10
±10
10
10
Twos complement
V min
V max
μA max
pF max
ISOURCE = 200 μA
ISINK = 200 μA
3.1
3.1
μs max
550
550
ns max
250
250
kSPS
Parallel interface mode only
5/15
−5/−15
5
5
3/5
18
26
0.25
0.25
7
400
94
140
40
25
5/15
−5/−15
5
5
3/5
18
26
0.25
0.25
7
400
94
140
40
25
V nom min/max
V nom min/max
V nom
V nom
V nom min/max
mA max
mA max
mA max
mA max
mA max
μA max
mW max
mW max
mW max
μW max
For the 4 × VREF range, VDD = 10 V to 16.5 V
For the 4 × VREF range, VDD = −10 V to −16.5 V
Digital inputs = 0 V or VDRIVE
AVCC = DVCC = VDRIVE = 5.25 V, VDD = 16.5 V,
VSS = −16.5 V
fSAMPLE = 250 kSPS, AVCC = DVCC = VDRIVE = 5.25 V,
VDD = 16.5 V, VSS = −16.5 V
VSS = −16.5 V, fSAMPLE = 250 kSPS
VDD = 16.5 V, fSAMPLE = 250 kSPS
AVCC = DVCC = VDRIVE = 5.25 V, VDD = 16.5 V,
VSS = −16.5 V
SCLK on or off, AVCC = DVCC = VDRIVE = 5.25 V,
VDD = 16.5 V, VSS = −16.5 V
AVCC = DVCC = VDRIVE = 5.25 V, VDD = 16.5 V,
VSS = −16.5 V
fSAMPLE = 250 kSPS
1 The temperature range for the B version is −40°C to +85°C and for the Y version is −40°C to +125°C
2 See the Terminology section.
3 Sample tested during initial release to ensure compliance.
4 Includes IAVCC, IVDD, IVSS, IVDRIVE, and IDVCC.
Rev. 0 | Page 8 of 32

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